This chapter describes how to use the CMC controllers to power on, manage, and monitor an SGI Altix UV 1000 or UV 100 system in the following sections:
The console type and how these console types are connected to the Altix UV 1000 systems is determined by what console option is chosen. Establish either a serial connection or network/Ethernet connection to the CMC.
Establish a serial connection
If you have an Altix UV 1000 system and wish to use a serially-connected "dumb terminal", you can connect the terminal via a serial cable to the (DB-9) RS-232-style console port connector on the CMC board of the IRU.
The terminal should be set to the following functional modes:
pin 2 - receive
pin 3 - transmit
pin 5 - ground
Baud: 115200
Data bits: 8
Parity: no
Stop bits: 1
No flow control
Note that a serial console is generally connected to the first (bottom) IRU in any single rack configuration. For more information, see the “Console Hardware Requirements” section in the SGI Altix UV 1000 System User's Guide.
Establish a Network/Ethernet connection (see SBK port, EXT port, and SMN port in Figure 1-6)
CMCs have their rack and u position set at the factory. The CMC will assign itself IP addresses, as follows:
SBK 172.17.<rack>.<slot>
EXT 10.<rack>.<slot>.1
On the system management node (SMN) port, the CMC is configured to request an IP address via dynamic host configuration protocol (DHCP).
Either connection, serial or network, will present a login prompt. For more information, see the “Levels of System Control” section in the SGI Altix UV 1000 System User's Guide.
To boot an SGI Altix UV 1000 or UV 100 system from complete power off, perform the following steps:
Make sure the power breakers are on.
Establish a serial connection to the CONSOLE on the CMC (see Figure 1-6). See “Connecting to the UV System Controller Network” or skip to the next step.
Establish a network connection to the CMC. “Connecting to the UV System Controller Network”. Use the ssh command to connect to the CMC, similar to the following example:
Note: This is only valid if your PC is connected to the CMC (via the network connection) has its /etc/hosts file setup to include the CMCs. ssh root@hostname-cmc SGI Chassis Manager Controller, Firmware Rev. 0.0.22 CMC:r1i1c>
Typically, the default password set out of the factory is root. The CMC prompt appears. CMC:r1i1c refers to rack 1, IRU 1, CMC (see Figure 1-5 and Figure 1-6)
If the host name is not set up in the PC/workstation's hosts file, you can simply use the IP address of the CMC, as follows:
ssh root@<IP-ADDRESS>
Power up your Altix UV system using the power on command, as follows:
CMC:r1i1c> power on
Note: You can open a second window on the CMC, ssh root@hostname-cmc and use the console command (same as uvcon) to open a console and watch the system power on. Open a second console to the CMC using the console command to see the system power on, as follows:
ssh root@hostname-cmc SGI Chassis Manager Controller, Firmware Rev. 0.0.22 CMC:r1i1c> console console: attempting connection to localhost... console: connection to SMN/CMC (localhost) established. console: requesting baseio console access at r001i01b00... console: tty mode enabled, use 'CTRL-]' 'q' to exit console: console access established console: CMC <--> BASEIO connection active ************************************************ ******* START OF CACHED CONSOLE OUTPUT ******* ************************************************ ******** [20100512.143541] BMC r001i01b10: Cold Reset via NL broadcast reset ******** [20100512.143541] BMC r001i01b07: Cold Reset via NL broadcast reset ******** [20100512.143540] BMC r001i01b08: Cold Reset via NL broadcast reset ******** [20100512.143540] BMC r001i01b12: Cold Reset via NL broadcast reset ******** [20100512.143541] BMC r001i01b14: Cold Reset via NL broadcast reset ******** [20100512.143541] BMC r001i01b04: Cold Reset via NL ....
Note: Use CTRL-] q to exit the console. Depending upon the size of your system, in can take 5 to 10 minutes for the Altix UV system to power on. When the shell> prompt appears, enter fs0, as follows:
shell> fs0
At the fs0 prompt, enter boot, as follows:
fs0> boot
ELILO Linux Boot loader is called and various SGI configuration scripts are run and the SUSE Linux Enterprise Server 11 SP1 installation program appears.
To power down the Altix UV stem, use the power off command, as follows:
CMC:r1i1c> power off ==== r001i01c (PRI) ==== |
You can use the power status command, to check the power status of your system
CMC:r1i1c> power status ==== r001i01c (PRI) ==== on: 0, off: 32, unknown: 0, disabled: 0 |
To send a nonmaskable interrupt (NMI) signal from the power command to the CMC to drop into the kernel debugger (KDB), use the power nmi command, as follows:
CMC:r1i1c> power nmi
Entering kdb (current=0xffff8aa3fe11c040, pid 0) on processor 7 due to NonMaskable Interrupt @ 0xffffffff8100ad42
r15 = 0x0000000000000000 r14 = 0x0000000000000000
r13 = 0x0000000000000000 r12 = 0x0000000000000000
bp = 0xffffffff81927380 bx = 0xffff8ac1ff11dfd8
r11 = 0xffffffff8101a2c0 r10 = 0xffff88000beefd18
r9 = 0x00000000ffffffff r8 = 0x0000000000000000
ax = 0x0000000000000000 cx = 0x0000000000000000
dx = 0x0000000000000000 si = 0xffff8ac1ff11dfd8
di = 0xffffffff81a2b308 orig_ax = 0xffffffffffffffff
ip = 0xffffffff8100ad42 cs = 0x0000000000000010
flags = 0x0000000000000246 sp = 0xffff88000bee7ff0
ss = 0x0000000000000018 ®s = 0xffff88000bee7f58
[7]kdb>
|
| Note: To enable the autopower utility, you need to be running CMC 1.2.7 or later firmware. |
Use the version command from the CMC prompt to determine the CMC firmware version, as follows:
uv44-cmc CMC:r001i01c> version SGI Chassis Manager Controller, Firmware Rev. 1.3.16 [Bootloader 0.6.0] |
Use the autopower command without any arguments to determine if autopower is enabled or disabled on your system, as follows:
uv44-cmc CMC:r001i01c> autopower ==== r001i01c (PRI) ==== auto-power on is disabled |
Use the autopower -e command to enable autopower, as follows:
uv44-cmc CMC:r001i01c> autopower -e ==== r001i01c (PRI) ==== auto-power on enabled (120 second delay) |
Use the autopower -d command to disable autopower, as follows:
uv44-cmc CMC:r001i01c> autopower -d ==== r001i01c (PRI) ==== auto-power on disabled |
For a usage statement, perform the following:
uv44-cmc CMC:r001i01c> autopower --h usage: autopower [-edc] [-t <seconds>] [--help] -e, --reset enable auto-power on -t, --time=<seconds> time (seconds) to delay auto-power on -d, --disable disable auto-power on -c, --cancel cancel auto-power on --help display this help and exit |
Flashing the CMC 1.2.7 or later firmware only adds support for autopower on, it does not enable it. To enable it, an autopower -e command must be issued at the CMC prompt once the system controller configuration has stabilized.
The default delay before a power on command is issued after auxiliary (aux) power is supplied to CMCs and BMCs is two minutes. This allows for the system controller configuration to stabilize (complete CMC and BMC detection).
Only the lowest numbered (rack and uposition) CMC will initiate the power on sequence. Because this is a CMC base feature, the maximum system configuration supported is 16 racks or less (both UV100 and UV1000).
For more information on using the autopower command, see “autopower” in Chapter 3.
To view your system configuration, use the config -v command, as follows:
CMC:r1i1c> config -v
CMCs: 2
r001i01c UV1000
r001i02c UV1000
BMCs: 32
r001i01b00 IP93-BASEIO
r001i01b01 IP93-DISK
r001i01b02 IP93-EXTPCIE
r001i01b03 IP93-EXTPCIE
r001i01b04 IP93
r001i01b05 IP93
r001i01b06 IP93
r001i01b07 IP93
r001i01b08 IP93
r001i01b09 IP93
r001i01b10 IP93
r001i01b11 IP93
r001i01b12 IP93
r001i01b13 IP93
r001i01b14 IP93
r001i01b15 IP93
r001i02b00 IP93-BASEIO
r001i02b01 IP93-EXTPCIE
r001i02b02 IP93-DISK
r001i02b03 IP93-EXTPCIE
r001i02b04 IP93-EXTPCIE
r001i02b05 IP93-EXTPCIE
r001i02b06 IP93-EXTPCIE
r001i02b07 IP93-EXTPCIE
r001i02b08 IP93-INTPCIE
r001i02b09 IP93-INTPCIE
r001i02b10 IP93-INTPCIE
r001i02b11 IP93-INTPCIE
r001i02b12 IP93-INTPCIE
r001i02b13 IP93-INTPCIE
r001i02b14 IP93-INTPCIE
r001i02b15 IP93-INTPCIE
Partitions: 1
partition000 BMCs: 32
|
r001i01b00 refers to rack 0, IRU 1, and blade 0. For a view of the physical layout of an IRU, see Figure 1-1, Figure 1-2, and Figure 1-3.
The hwcfg command allows you to set hardware configuration overrides. Many of the hardware overrides available on early Altix UV systems are no longer necessary due to firmware enhancements and hardware changes. Most of these overrides are still available but have been “hidden” and require the -h flag to make them visible.
To see a list of current override settings, use the “hwcfg” command. This will show all overrides set on any blades in the system. If any overrides are set on some blades and not on others, the output will show a count of blades where the override is set.
To see a list of blades where each override is set, use the hwcfg -v command.
To see individual list of blades and their overrides, use hwcfg -vv command.
To set one or more overrides, use hwcfg <name>=<value> command. For example,
hwcfg DEBUG_SW=0x4 |
To clear overrides, use hwcfg -c command.
To clear all overrides, use the hwcfg -c -a command.
To clear one or more variables, use hwcfg -c <name> [...<name>].
Multiple <name>=<value> pairs can be set in one command
You can show a list of hwcfg variables available, as follows:
uv44-cmc CMC:r1i1c> hwcfg --list
==== 4/4 BMC(s) ====
SOCKET_DISABLE=yes|no|<socket bitmask>
Socket 0 disable
PARTITION=<numeric value 0-65535>
Partition number for this blade
SMT_ENABLE=yes|no
SMT (HyperThread) enable
MAX_CORES=<numeric value 0-255, 0=no limit>
Maximum number of cores allowed (per node)
BLADE_DISABLE=yes|no
Disable this blade
IORISER_DISABLE=yes|no
Disable the I/O riser on this blade
ICH_DISABLE=yes|no
Disable ICH10 on this BaseIO
DEBUG_SW=<32-bit value>
Software debug switches (see "hwcfg --help DEBUG_SW" for details)
HUB_CORE_SPEED=320|367|375|383|400
Clock frequency of the HUB
NL5_ENABLE=yes|no|<NL5 port bitmask>
Enable NL5 links
NL5_RATE=1.25|2.5|3.125|5.0|6.25
NL5 transfer rate
NL5_CABLE_ENABLE=yes|no
Enable cabled NL5 links
NL5_NEAR_LB=yes|no
Configure NL5 channels in near loopback
NL5_SCRAMBLE=yes|no|<NL5 port bitmask>
Enable scramble mode on NL5 links
NL5_HUB2_WAR=yes|no
Enable the NL5 PHY/BIST war for Hub2.0
|
To show all variables regardless of state, perform the following:
uv44-cmc CMC:r1i1c> hwcfg --all BLADE_DISABLE=no DEBUG_SW=0x0 HUB_CORE_SPEED=375 ICH_DISABLE=no IORISER_DISABLE=no MAX_CORES=0 NL5_CABLE_ENABLE=yes NL5_ENABLE=yes NL5_HUB2_WAR=yes NL5_NEAR_LB=no NL5_RATE=6.25 NL5_SCRAMBLE=0x0 PARTITION=0 SMT_ENABLE=no SOCKET_DISABLE=no uv44-cmc CMC:r1i1c> |
To show a list of hidden hardware overrides, perform the following:
uv44-cmc:~ # hwcfg --hidden --all
BACKPLANE_TYPE=default
BLADE_DISABLE=no
DEBUG_SW=0x100
ICH_DISABLE=no
IORISER_DISABLE=no
MAX_CORES=0
NL5_CABLE_ENABLE=yes
NL5_ENABLE=yes
PARTITION=0
ROUTER_TYPE=ordinary
SMT_DISABLE=no
SOCKET_DISABLE=no
{HIDDEN} BIOS_GO_REG=(null):0x0
{HIDDEN} BIOS_HOLD=no
{HIDDEN} BMC_RESET_DEBUG=0x0
{HIDDEN} BOOTMODE=DC
{HIDDEN} HUB_CORE_SPEED=375
{HIDDEN} HUB_DISABLE=no
{HIDDEN} HUB_QPI_BMC_CONFIG=FULL
{HIDDEN} HUB_QPI_SPEED=5.86
{HIDDEN} HUB_XDP=no
{HIDDEN} IOH_QPI_BMC_CONFIG=NONE
{HIDDEN} IOH_QPI_SPEED=6.4
{HIDDEN} IO_XDP=no
{HIDDEN} LTC_FILE=
{HIDDEN} NL5_CABLE_RATE=6.25
{HIDDEN} NL5_CABLE_TX_EMPHASIS=0x0
{HIDDEN} NL5_HUB2_WAR=yes
{HIDDEN} NL5_NEAR_LB=no
{HIDDEN} NL5_NO_NI3_WAR=no
{HIDDEN} NL5_RATE=6.25
{HIDDEN} NL5_SCRAMBLE=yes
{HIDDEN} NL5_TUNE_ENABLE=yes
{HIDDEN} NL5_TX_EMPHASIS=0x0
{HIDDEN} QPI_CRC_MODE=0x0
{HIDDEN} SKT_QPI_BMC_CONFIG=NONE
{HIDDEN} SKT_QPI_SPEED=6.4
{HIDDEN} SPREAD_SPEC_CLK=no
|
CMCs have their rack and u position set at the factory. The CMC will assign itself IP addresses, as follows:
SBK 172.17.<rack>.<slot>
EXT 10.<rack>.<slot>.1
On the system management node (SMN) port, the CMC is configured to request an IP address via dynamic host configuration protocol (DHCP).
To find the IP address of the CMC, connect a network cable to the SMN jack and CMC will request and get a DHCP address. See “Connecting to the UV System Controller Network”.
The IP address and hostname of your system CMC resides in the /etc/sysconfig/ifcfg-eth0 file, as follows:
CMC:r1i1c> cat /etc/sysconfig/ifcfg-eth0 BOOTPROTO=static IPADDR=137.38.82.88 NETMASK=255.255.255.0 GATEWAY=137.38.82.254 HOSTNAME=uv15-cmc |
A single SGI Altiux UV 100 or 1000 series system can be divided into multiple distinct systems, each with its own console, root filesystem, and IP network address. Each of these software-defined group of processors are distinct systems referred to as a partition. Each partition can be rebooted, loaded with software, powered down, and upgraded independently. The partitions communicate with each other over an SGI NUMAlink connection. Collectively, all of these partitions compose a single, shared-memory cluster.
The following example shows how to use CMC software to partition a two rack system containing four IRUs into four distinct systems, use the console (same as, uvcon) command to open a console and boot each partition and repartiton it back to a single system.
 | Important: Each partition must have one base I/O blade and one disk blade for booting. 001i01b00 refers to rack 1, IRU 0, and blade00. r001i01b01 refers to rack 1, IRU 0, and blade01. |
Base I/O and the boot disk are displayed by the config -v command, similar to the following:
r001i01b00 IP93-BASEIO r001i01b01 IP93-DISK |
Use the hwcfg command to create four system partitions, as follows:
CMC:r1i1c>hwcfg partition=1 "r1i1b*” CMC:r1i1c>hwcfg partition=2 "r1i2b*” CMC:r1i1c>hwcfg partition=3 "r2i1b*” CMC:r1i1c>hwcfg partition=4 "r2i2b*”
Use the config -v command to show the four partitions, as follows:
CMC:r1i1c> config -v CMCs: 4 r001i01c UV1000 SMN r001i02c UV1000 r002i01c UV1000 r002i02c UV1000 BMCs: 64 r001i01b00 IP93-BASEIO P001 r001i01b01 IP93-DISK P001 r001i01b02 IP93-INTPCIE P001 r001i01b03 IP93 P001 r001i01b04 IP93 P001 r001i01b05 IP93 P001 r001i01b06 IP93 P001 r001i01b07 IP93 P001 r001i01b08 IP93 P001 r001i01b09 IP93-INTPCIE P001 r001i01b10 IP93-INTPCIE P001 r001i01b11 IP93-INTPCIE P001 r001i01b12 IP93-INTPCIE P001 r001i01b13 IP93 P001 r001i01b14 IP93 P001 r001i01b15 IP93 P001 r001i02b00 IP93-BASEIO P002 r001i02b01 IP93-DISK P002 r001i02b02 IP93-INTPCIE P002 r001i02b03 IP93 P002 r001i02b04 IP93 P002 r001i02b05 IP93 P002 r001i02b06 IP93 P002 r001i02b07 IP93 P002 r001i02b08 IP93 P002 r001i02b09 IP93 P002 r001i02b10 IP93 P002 r001i02b11 IP93 P002 r001i02b12 IP93 P002 r001i02b13 IP93 P002 r001i02b14 IP93 P002 r001i02b15 IP93 P002 r002i01b00 IP93-BASEIO P003 r002i01b01 IP93-DISK P003 r002i01b02 IP93 P003 r002i01b03 IP93 P003 r002i01b04 IP93 P003 r002i01b05 IP93 P003 r002i01b06 IP93 P003 r002i01b07 IP93 P003 r002i01b08 IP93 P003 r002i01b09 IP93 P003 r002i01b10 IP93 P003 r002i01b11 IP93 P003 r002i01b12 IP93 P003 r002i01b13 IP93 P003 r002i01b14 IP93 P003 r002i01b15 IP93 P003 r002i02b00 IP93-BASEIO P004 r002i02b01 IP93-DISK P004 r002i02b02 IP93 P004 r002i02b03 IP93 P004 r002i02b04 IP93 P004 r002i02b05 IP93 P004 r002i02b06 IP93 P004 r002i02b07 IP93 P004 r002i02b08 IP93 P004 r002i02b09 IP93 P004 r002i02b10 IP93 P004 r002i02b11 IP93 P004 r002i02b12 IP93 P004 r002i02b13 IP93 P004 r002i02b14 IP93 P004 r002i02b15 IP93 P004 Partitions: 4 partition001 BMCs: 16 partition002 BMCs: 16 partition003 BMCs: 16 partition004 BMCs: 16Use can also use the hwcfg command to display the four partitions, as follows:
CMC:r1i1c> hwcfg NL5_RATE=5.0 PARTITION=1 ................................................ 16/64 BMC(s) PARTITION=2 ................................................ 16/64 BMC(s) PARTITION=3 ................................................ 16/64 BMC(s) PARTITION=4 ................................................ 16/64 BMC(s)
To reset the system and boot the four partitions, use the following commands:
CMC:r1i1c> power on "p*"
Note: In the power on “p*” command, above, quotes are required to prevent shell expansion. The power on command, by itself, will not succeed in this instance because it will attempt to power on across partition boundries. If all four partitions are to be powered on at once, then the -o|--override option much be given or power on "p*" must be used.
If the system is off, then a power on "p*" is required. If the system is already on, a power reset “p*” will cause a reboot.
Use the console (same as, uvcon)command to open consoles to each partition and boot the partitions. Open a console to partition one, as follows:
CMC:r1i1c> console p1 console: attempting connection to localhost... console: connection to SMN/CMC (localhost) established. console: requesting baseio console access at partition 1 (r001i01b00)... console: tty mode enabled, use 'CTRL-]' 'q' to exit console: console access established (OWNER) console: CMC <--> BASEIO connection active ************************************************ ******* START OF CACHED CONSOLE OUTPUT ******* ************************************************ ******** [20100513.215944] BMC r001i01b15: Cold Reset via NL broadcast reset ******** [20100513.215944] BMC r001i01b07: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b13: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b05: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b06: Cold Reset via NL broadcast reset ******** [20100513.215946] BMC r001i01b10: Cold Reset via NL broadcast reset ******** [20100513.215946] BMC r001i01b09: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b11: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b12: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b04: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b08: Cold Reset via NL broadcast reset ******** [20100513.215946] BMC r001i01b02: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b00: Cold Reset via NL broadcast reset ******** [20100513.215945] BMC r001i01b14: Cold Reset via NL broadcast reset ******** [20100513.215947] BMC r001i01b09: Cold Reset via ICH ******** [20100513.215946] BMC r001i01b12: Cold Reset via ICH ******** [20100513.215947] BMC r001i01b10: Cold Reset via ICH ******** [20100513.215947] BMC r001i01b11: Cold Reset via ICH ******** [20100513.215947] BMC r001i01b02: Cold Reset via ICH ******** [20100513.215947] BMC r001i01b00: Cold Reset via ICH ******** [20100513.215953] BMC r001i01b03: Cold Reset via NL broadcast reset ******** [20100513.220011] BMC r001i01b01: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b08: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b07: Cold Reset via NL broadcast reset ******** [20100513.220011] BMC r001i01b15: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b06: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b05: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b14: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b13: Cold Reset via NL broadcast reset ******** [20100513.220011] BMC r001i01b04: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b03: Cold Reset via NL broadcast reset ******** [20100513.220013] BMC r001i01b09: Cold Reset via NL broadcast reset ******** [20100513.220013] BMC r001i01b10: Cold Reset via NL broadcast reset ******** [20100513.220013] BMC r001i01b11: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b12: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b02: Cold Reset via NL broadcast reset ******** [20100513.220012] BMC r001i01b00: Cold Reset via NL broadcast reset ******** [20100513.220014] BMC r001i01b09: Cold Reset via ICH ******** [20100513.220014] BMC r001i01b10: Cold Reset via ICH ******** [20100513.220014] BMC r001i01b11: Cold Reset via ICH ******** [20100513.220013] BMC r001i01b12: Cold Reset via ICH ******** [20100513.220013] BMC r001i01b02: Cold Reset via ICH ******** [20100513.220016] BMC r001i01b00: Cold Reset via ICH ******** [20100513.220035] BMC r001i01b14: Cold Reset via NL broadcast reset ******** [20100513.220035] BMC r001i01b06: Cold Reset via NL broadcast reset ******** [20100513.220034] BMC r001i01b15: Cold Reset via NL broadcast reset ******** [20100513.220035] BMC r001i01b05: Cold Reset via NL broadcast reset ******** [20100513.220034] BMC r001i01b01: Cold Reset via NL broadcast reset ******** [20100513.220035] BMC r001i01b07: Cold Reset via NL broadcast reset . . . . . . . . . . . . . . . . . . . .... Hit [Space] for Boot Menu. ELILO boot: . . . .... .
Note: Use the console command to open consoles on the other three partitions and boot them. The system will then have four single system images. Use the hwcfg -c partition command to clear the four partitions, as follows:
CMC:r1i1c> hwcfg -c partition PARTITION=0 <PENDING RESET>
To reset the system and boot it as a single system image (one partition), use the following command:
CMC:r1i1c> power reset "p*" For detailed instructions on how to use the UV controller commands to partition a system, see “System Partitioning” in the SGI Altix UV Linux Configuration and Operations Guide.
To upgrade the compute blade BIOS, perform the following steps:
From the CMC prompt, to show the current PROM level perform the following command:
CMC:r1i1c> bios Flashed on Sat May 1 14:14:45 UTC 2010 was bios.latest.fd (20100429_1603)
Get the newest PROM image from SupportFolio Online at http://support.sgi.com/
Note: Upgrading to Altix UV BIOS 2.00 release (or later) from a pre-2.00 Altix UV BIOS release requires the setup variables to be cleared using either the flashbios -e or power -c reset CMC commands. This will also clear any site specific settings, such as M/N values and EFI boot menu changes, and these site specific settings will need to be reconfigured at the 2.00 boot menu. Copy the latest BIOS to a directory on the CMC in /work/bmc/common/ An example directory is, as follows:
CMC:r1i1c> ls bios.latest.fd flashbios
Use the flashbios command to flash the compute blade BIOS, as follows:
CMC:r1i1c> flashbios Using default bios: bios.latest.fd Checking processor status on all nodes.... Done. System is read for BIOS flash update Flashing bios bios.lastest.fd (20100429_1603) This will take several minutes. ...
There are three firmware flashing commands available from the system management node (SMN) for flashing an entire SGI Altix UV system, as follows:
flashcmc
flashbmc
flashiobmc
For more information on how to use these commands, see the “Updating Firmware” section in chapter one of the SGI Altix UV System Management Node Administrator's Guide.
Threading in a software application splits instructions into multiple streams so that multiple processors can act on them.
Hyper-Threading (HT) Technology, developed by Intel Corporation, provides thread-level parallelism on each processor, resulting in more efficient use of processor resources, higher processing throughput, and improved performance. One physical CPU can appear as two logical CPUs by having additional registers to overlap two instruction streams or a single processor can have dual-cores executing instructions in parallel.
For more information about using HT, see “Using Cpusets with Hyper-Threads” in the Linux Resource Administration Guide.